kygugl.blogg.se

Parsec benchmark
Parsec benchmark






PARSEC BENCHMARK SIMULATOR

Simdev - A very small input set which guarantees basic program behavior similar to the real behavior, intended for simulator test and development.Test - A very small input set to test the basic functionality of the program.PARSEC meets all the requirements outlined.PARSEC workloads were selected to include different combinations of parallel models, machine requirements and runtime behaviors.It consists of 9 applications and 3 kernels.Requirements for a Benchmark Suite- Objectives of PARSEC Limitations of Existing Benchmark Suites It includes not only a number of important RMS applications but also several leading-edge applications from Princeton University, Stanford University, and the open-source domain.The lack of good benchmark suites can hamper parallel architecture research as well as reduce its impact.The existing benchmark suffer from a number of limitations and are not adequate to evaluate future CMPs.249-6399, 1996.The PARSEC Benchmark Suite 발표자 이보선 Characterization and Architectural Implications Shi, Reevaluating amdahlÕs law and gustafsonÕs law, Inria RESEARCH CENTRE RENNES ? BRETAGNE ATLANTIQUE Campus universitaire de Beaulieu 35042 Rennes Cedex Publisher Inria Domaine de Voluceau -Rocquencourt BP 105 -78153 Le Chesnay Cedex ISSN, pp. Rohou, Tiptop: Hardware Performance Counters for the Masses, 2012 41st International Conference on Parallel Processing Workshops, 2011. Meyer, AmdahlÕs law revisited for single chip systems, International Journal of Parallel Programming, vol. Grundmann, From single core to multi-core, Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design, ICCAD '06, pp. Stenstrom, Implications of Merging Phases on Scalability of Multi-core Architectures, 2011 International Conference on Parallel Processing, pp. Bala et al., Optimistic parallelism requires abstractions, ACM SIGPLAN Notices, vol. How much parallelism is there in irregular applications? SIGPLAN Not, pp. Inkulu, Keshav Pingali, and Calin Casçaval. Pingali, Lonestar: A suite of parallel irregular programs, 2009 IEEE International Symposium on Performance Analysis of Systems and Software, pp. Krishnaprasad, Uses and abuses of amdahl's law, J. Meenderinck, Amdahl's law for predicting the future of multicores considered harmful, ACM SIGARCH Computer Architecture News, vol. Marty, Amdahl's law in the multicore era, Computer, issue. Ni, Another view on parallel speedup, Supercomputing '90., Proceedings of, pp.

parsec benchmark

Gustafson, Reevaluating Amdahl's law, Communications of the ACM, vol. Eeckhout, Modeling critical sections in amdahl's law and its implications for multicore design, Conference Proceedings Annual International Symposium on Computer Architecture, pp. Borkar, Thousand core chips, Proceedings of the 44th annual conference on Design automation, DAC '07, pp. Li, The PARSEC benchmark suite, Proceedings of the 17th international conference on Parallel architectures and compilation techniques, PACT '08, pp. Li, Fidelity and scaling of the PARSEC benchmark inputs, IEEE International Symposium on Workload Characterization (IISWC'10), pp. Amdahl, Validity of the single processor approach to achieving large scale computing capabilities, spring joint computer conference, AFIPS '67 (Spring), Proceedings of the, pp.






Parsec benchmark